Parameterized Priority Encoder
Submitted by abettino on Mon, 03/01/2010 - 20:24
This SystemVerilog parameterizer priority encoder is very similar to the SystemVerilog Parameterized Selector.
module parameterized_priority_encoder #(parameter INPUT_WIDTH=8,OUTPUT_WIDTH=3) ( input logic [INPUT_WIDTH-1:0] input_data, output logic [OUTPUT_WIDTH-1:0] output_data ); int ii; always_comb begin output_data = 'x; for(ii=0;ii<INPUT_WIDTH;ii++) if (input_data[ii]) output_data = ii; end endmodule
| Attachment | Size |
|---|---|
| parameterized_priority_encoder.sv | 349 bytes |
