Verilog JK Flip Flop
Submitted by abettino on Thu, 03/18/2010 - 21:24
A JK flip flop can be considered the "universal" flip flop since any other flip flop can be constructed from it. While this is an interesting point, it does not have any real world implications since digital electronics is dominated by the D flip flop. Nevertheless, it makes for an interesting discussion.
Here is a snippet for the JK flip flop.
module jk_flip_flop ( input clk, input j, input k, output reg q ); always @(posedge clk) case ({j,k}) 2'b11 : q <= ~q; // toggle. 2'b01 : q <= 1'b0; // reset. 2'b10 : q <= 1'b1; // set. 2'b00 : q <= q; // hold. endcase endmodule
And this is how a D flip flop can be synthesized from a JK flip flop.
module d_from_jk_flip_flop ( input clk, input d, output q ); jk_flip_flop d_flop ( .clk (clk), .j (d ), .k (~d ), .q (q ) ); endmodule
And finally a T flip flop can also be synthesized from the JK flip flop.
module t_from_jk_flip_flop ( input clk, input t, output q ); jk_flip_flop t_flop ( .clk (clk), .j (d ), .k (d ), .q (q ) ); endmodule
| Attachment | Size |
|---|---|
| jk_flip_flop.v | 625 bytes |