Verilog Display with No Newline ($write statment)

Sometimes it is desired to output some text to the standard output without displaying a newline character. The Verilog command $display() will display text in a printf fashion, but it always comes with a newline. Conversely, the $write() command behaves just as the $display() command but does not include the new line. The following example uses the $write() command to display a table of the numbers 0-99.

module no_newline;
 
integer ii,jj;
 
initial begin
  for(ii=0;ii<10;ii=ii+1) begin
    for(jj=0;jj<10;jj=jj+1) begin
      $write("%d ",jj+ii*10);
    end
    $write("\n");
  end
  $stop;
end
 
endmodule